The course will take place in Hybrid format and will be held in-person within the UPC premises: Department of Computer Architecture (DAC). Room C6-E101, Barcelona, Spain; and also, online via Zoom with required registration.

All the PATC courses at BSC are free of charge. The attendees would need to cover the expenses for travel, accommodation and meals.

Course Convener: Xavier Martorell, BSC Computer Sciences/ Parallel Programming Models Group Manager


BSC - Computer Sciences department

Daniel Jimenez-Gonzalez - Programming Models - Associate Researcher
Carlos Alvarez - Programming Models - Associate Researcher
Xavier Martorell - Programming Models - Parallel programming model - Group Manager



This tutorial will introduce the audience to the BSC tools for heterogenous programming on FPGA devices. It describes OmpSs@FPGA, as a productive programming environment for compute systems with FPGAs.

More specifically, the tutorial will:

  • Introduce the OmpSs@FPGA programming model, how to write, compile and execute applications on FPGAs
  • Show the "implements" feature to explot parallelism across cores and IP cores
  • Demonstrate how to analyze applications to determine which portions can be executed on FPGAs, and use OmpSs@FPGA to parallelize/optimize them.

Learning Outcomes:   The students who finish this course will be able to develop benchmarks and simple applications with the OmpSs@FPGA programming model to be executed in FPGA boards, like Zedboard or Xilinx ZCU102.


  • Good knowledge of C/C++
  • Basic knowledge of acceleration architectures and offloading models
  • Basic knowledge of Paraver/Extrae