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SUMMARY:[ONSITE] BSC Training Course: It's the memory\, stupid! @ BSC
DTSTART;VALUE=DATE-TIME:20260225T090000Z
DTEND;VALUE=DATE-TIME:20260225T160000Z
DTSTAMP;VALUE=DATE-TIME:20260420T133100Z
UID:indico-event-1615@events.prace-ri.eu
CONTACT:patc@bsc.es
DESCRIPTION: BSC Training Courses are free of charge. Please bring your 
 own laptop. \n\n“In 1995\, Wulf and McKee published a four-page note ent
 itled Hitting the Memory Wall: Implications of the Obvious. The article pr
 ojected the performance impact of the increasing speed gap between process
 ors and memory\, and predicted that\, if the trends held\, relative memor
 y latencies would soon be so large that the processor would essentially al
 ways be waiting for memory — which amounts to hitting the wall.”  \n
 \n“Technological evolutions and revolutions notwithstanding\, the memory
  wall has imposed a fundamental limitation to system performance for 20 ye
 ars.”\n\nSally McKee\, 2015.\nAnother Trip to the Wall: How Much Will S
 tacked DRAM Benefit HPC?\n\n \n\nToday\, we are hitting the memory wall
  harder than ever — and most of us aren’t even aware of it.\n\nObject
 ives\n\nThis course is designed to help you determine whether your applica
 tion has a memory-related performance problem and what you can do about it
 .\n\nWe will begin with a brief overview of memory system fundamentals. Th
 is background will help you understand the hardware aspects of the memory 
 problem — and why the situation is unlikely to improve in the near futur
 e. We’ll also discuss memory system performance metrics such as latency
  and bandwidth\, and how they interact. To improve your application’s 
 use of the memory system\, you first need to understand how that system ac
 tually works.\n\nThe main sessions of the course will introduce tools that
  can help you analyze memory-related performance issues in your codes:\n\n
 \n	Roofline models\n	Memory stress (Mess) framework  \n	CPI stack (TopDow
 n)\n\n\nFor each tool\, we’ll cover its key concepts\, how it views the 
 memory system\, and how it can be used to analyze applications. We’ll ex
 plore both simple illustrative examples and real-life use cases. Each tool
  will be covered in a dedicated one-hour session.\n\nWe’ll conclude the 
 course with two advanced topics. First\, performance prediction of future
  memory systems — including practical guidelines on how to estimate pot
 ential performance gains for your applications on systems using more advan
 ced memory technologies.  Second\, we’ll discuss the motivation and ch
 allenges behind heterogeneous memory systems. Comprised of devices with d
 ifferent capacities and performance characteristics\, these systems aim to
  combine the best features of each component. However\, over the past deca
 de\, heterogeneous memory systems have repeatedly demonstrated that compl
 ex architectures that are difficult to program often fall behind simpler o
 nes that are easy to use.\n\n \n\nRequirements\n\n\n	Basic background in
  computer architecture (undergraduate level).\n	Basic programming skills
 .\n	Some familiarity with the Roofline model\, Mess framework and CPI 
 stack is desirable but not mandatory.\n\n\nLearning Outcomes\n\nBy the en
 d of the course\, participants will:\n\n\n	Gain historical and technologic
 al insight into why the memory wall has persisted for more than 30 years
  — and why it’s here to stay.\n	Understand the structure and behavior 
 of modern memory systems and their impact on application performance.\n	Le
 arn what to expect from key memory profiling tools — Roofline models\, M
 ess framework\, and CPI stacks — and how to interpret their results.\n	R
 eceive pointers to advanced\, publicly available materials for deeper expl
 oration.\n	Be introduced to advanced topics in memory system design and ef
 ficient memory usage\n\n\nhttps://events.prace-ri.eu/event/1615/
LOCATION:Room SV 208 (Vertex building)
URL:https://events.prace-ri.eu/event/1615/
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