Intel MIC&GPU Programming Workshop @ LRZ

LRZ Building

LRZ Building

University Campus, Boltzmannstr. 1, Garching, near Munich Germany

With the rapidly growing demand for computing power new accelerator based architectures have entered the world of high performance computing since around 5 years. Particularly GPGPUs have recently become very popular, however programming GPGPUs using programming languages like CUDA or OpenCL is cumbersome and error-prone. Beyond introducing the basics of GPGPU-porogramming, we mainly present OpenACC as an easier way to program GPUs using OpenMP-like pragmas. Recently Intel developed their own Many Integrated Core (MIC) architecture which can be programmed using standard parallel programming techniques like OpenMP and MPI. In the beginning of 2013, the first production-level cards named Intel Xeon Phi came on the market. The course discusses various programming techniques for Intel Xeon Phi and includes hands-on session for both MIC and GPU programming. The course is developed in collaboration with the Erlangen Regional Computing Centre (RRZE) within KONWIHR.

Each day is comprised of approximately 5 hours of lectures and 2 hours of hands-on sessions.


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