PRACE Cray XT5 Code-Porting Workshop, Switzerland

CET
Description

The Swiss National Supercomputing Centre (CSCS) is pleased to announce, in association with the Partnership for Advanced Computing in Europe (PRACE), a three-day Cray XT5 code porting workshop. The workshop will be held from the 13th – 15th July, 2009 at CSCS, Manno and will consist of a series of lectures and “hands-ons” sessions covering fundamental through advanced code optimization and porting techniques. The workshop is open to participants from all PRACE Member countries.

Click here to see the video of the course.

Instructors:

  • John Levesque – Director, Cray Supercomputing Center of Excellence
  • Luiz DeRose - Cray Supercomputing Center of Excellence
  • Roberto Ansaloni – Cray Inc, Italy
Slides
    • 9:30 AM 10:30 AM
      Architecture of the AMD Quad Core

      a. Architectural features that the application developer needs to know
      • i. Functional Units
      • ii. Cache Architecture
      • iii. Memory interface
      b. Issues using Quad core node in XT5 MPP

    • 10:30 AM 10:45 AM
      Coffee Break 15m
    • 10:45 AM 11:30 AM
      Compiler considerations when using the Quad Core

      a. Vectorization to use SSE instructions
      b. Memory pre-fetching
      c. How to use shared memory parallelization in the compiler

    • 11:30 AM 12:15 PM
      Using Craypat to profile applications on the XT5
    • 12:15 PM 2:00 PM
      Lunch Break 1h 45m
    • 2:00 PM 4:30 PM
      Assignment – obtain profiles of your application running on the XT5
    • 9:00 AM 10:30 AM
      Optimizations for the AMD Quad Core

      a. Optimization techniques that the application developer needs to know
      i. Vectorization
      ii. Blocking for cache
      iii. Using prefetch directives

    • 10:30 AM 10:45 AM
      Coffee Break 15m
    • 10:45 AM 11:45 AM
      Using Apprentice to examine hardware counters for understanding cache utilization and vectorization
    • 11:45 AM 1:30 PM
      Lunch Break 1h 45m
    • 1:30 PM 4:30 PM
      Assignment – optimize your application for node performance
    • 9:00 AM 10:30 AM
      Message Passing Optimizations for the XT5

      a. Optimization techniques that the application developer needs to know
      i. Pre-posting messages
      ii. MPI environment variables

    • 10:30 AM 10:45 AM
      Coffee Break 15m
    • 10:45 AM 11:45 AM
      Technical Presentation - Joost VandeVondele
    • 11:45 AM 12:45 PM
      Using Apprentice to examine MPI performance
    • 12:45 PM 2:30 PM
      Lunch Break 1h 45m
    • 2:30 PM 4:00 PM
      Assignment – optimize your application for MPI performance