Code Modernisation for Intel Multi Core and Xeon Phi Architectures

Bulgarian Academy of Sciences Institute of Information and Communication Technologies Akad.G.Bonchev St, bl. 25A 1113 Sofia, Bulgaria

Intel together with the National Center for Supercomputing Applications (NCSA) announces technical training school “Code Modernisation for Intel Multi Core and Xeon Phi Architectures”, which will take place on April 25-28 in Sofia at the Institute of Information and Communication Technologies, Bulgarian Academy of Sciences.

The school will focus on software modernization techniques needed for the next generation of supercomputers with highly dense parallel architectures, both homogeneous (Intel Xeon) and hybrid with acceleration co-processor (Intel Xeon Phi). The school program is comprised of lectures and training exercises to address the crucial aspects of both the implementation of new HPC applications as well as the re-factoring of existing ones. These software engineering techniques for high productivity languages complement the more traditional lectures on parallel programming, to allow the implementation and continual modernization of applications that need to be maintained across complex and fast evolving HPC architectures.

Тhe training event web site can found at

DISCLAIMER: Some of the material used in this training event has been prepared by INTEL. The training event is financially supported in part by the PRACE-4IP project funded by the EU’s Horizon 2020 research and innovation programme (2014-2020) under grant agreement 653838. The training material prepared by INTEL, solely reflects the opinion INTEL in the context of such training event. Please note that the content of this training material has not been approved by the PRACE Project Partners and therefore does not emanate from them nor should it be considered to reflect their individual or collective opinion.

The agenda of this meeting is empty