Goals
This workshop organized by JSC through the VI-HPS for the German PRACE Advanced Training Centre will:
- give an overview of the VI-HPS programming tools suite
- explain the functionality of individual tools, and how to use them effectively
- offer hands-on experience and expert assistance using the tools
For details see: http://www.vi-hps.org/training/tws/tw25.html
Programme Overview
Presentations and hands-on sessions are planned on the following topics:
- Setting up, welcome and introduction
- Score-P instrumentation and measurement
- Scalasca automated trace analysis
- Vampir interactive trace analysis
- TAU performance system
- Extra-P automated performance modeling
- Paraver/Extrae/Dimemas trace analysis and performance prediction
- MAQAO performance analysis & optimisation
- MUST runtime error detection for MPI
- ARCHER runtime error detection for OpenMP
- ... and potentially others
A brief overview of the capabilities of these and associated tools is provided in the VI-HPS Tools Guide.
The workshop will be held in English and run from 09:00 to not later than 18:00 each day, with breaks for lunch and refreshments. For participants from public research institutions in PRACE countries, the course fee is sponsored through the PRACE PATC program. All participants are responsible for their own travel and accommodation.
Classroom capacity is limited, therefore priority will be given to applicants with parallel codes already running on the workshop computer system (CLAIX), and those bringing codes from similar x86 cluster systems to work on. Participants are therefore encouraged to prepare their own MPI, OpenMP and hybrid MPI+OpenMP parallel application codes for analysis.
Participants are expected to use their own notebook computers to connect to the workshop computer systems via SSH: X11 will also be required for the graphical tools.
Hardware and Software Platforms
CLAIX2016: NEC x86_64 Linux cluster system:
- 600+ 'MPI' compute nodes each with two Intel Xeon E5-2650v4 'Broadwell' processors (2.2GHz, 12 cores per processor, 2 hardware threads per core) and 128GB shared memory
- 8 'SMP' compute nodes each with eight Intel Xeon E7-8860v4 'Broadwell' processors (2.2GHz, 18 cores per processor, 2 hardware threads per core) and 1024GB shared memory
- software: CentOS 7.2 GNU/Linux, Intel MPI; Intel, GCC and other compilers;
The local HPC system CLAIX is the primary platform for the workshop and will be used for the hands-on exercises. Course accounts will be provided during the workshop. Participants with accounts on the JURECA cluster and JUQUEEN BlueGene/Q at JSC will also be assisted using those systems. Other systems where up-to-date versions of the tools are installed can also be used when preferred, though support may be limited and participants are expected to already possess user accounts. Regardless of whichever systems they intend to use, participants should be familiar with the relevant procedures for compiling and running their parallel applications (via batch queues where appropriate).
Accommodation in Aachen
A contingent of rooms at various hotels in Aachen have been reserved until 5 March 2017: after that there's no guarantee desired rooms will still be available. Alternatively consult the full accommodation list.
The detailed program will be available under VI-HPS training web site.
