Intel Xeon Phi programming @IT4I

CET
207 (VŠB - Technical University Ostrava, IT4Innovations building)

207

VŠB - Technical University Ostrava, IT4Innovations building

Studentská 6231/1B 708 33 Ostrava – Poruba Czech Republic
Description

Summary

The course focuses on optimization oriented programming for the latest Intel Architectures for HPC. It covers state of the art Intel Architecture features, changes among the recent generations and trends to support HPC software developers and researchers in designing their applications. During the two day course also software development and analysis tools are covered as needed for C/C++ & Fortran development with the focus on performance, vectorization and energy efficiency. The course furthermore includes an overview of the latest OpenMP 4.5 standard including different ways of threading applications, how to leverage vectorization and offloading.

Purpose of the course (benefits for the attendees)

Participants will learn about the latest Intel Architectures, common problems and pitfalls dedicated to HPC, how to select and apply various software development tools, as well as the state of the art OpenMP programming techniques.

About the tutors

Georg Zitzlsberger formerly worked for Intel Deutschland GmbH (Germany). He has been a Technical Consulting Engineer for Intel(R) Software Development tools for many years before he recently joined IT4Innovations. In his new role as researcher he offers consulting services for Intel Software Development tools and Intel architectures throughout the IT4Innovations network.

Martin Golasowski is a research assistant and a Ph.D. student in the Advanced Data Analysis and Simulation Laboratory of the IT4Innovations National Supercomputing Center of the Czech Republic. Topic of his research are high performance programming models for Monte Carlo methods and emerging heterogenous architectures. He also contributes to a H2020 project ANTAREX as a developer of benchmarking infrastructure of an experimental server-side routing service. His other interests include parallel computing architectures, data processing and visualisation.

Michal Merta is a researcher at IT4Innovations National Supercomputing Center. He obtained his Ph.D. degree in Applied mathematics. He is mainly interested in the parallel boundary element method (BEM) and is a co-founder of the library BEM4I that aims at parallel solution of problems from linear elasticity to sound scattering using BEM. He participated within the Intel Parallel Computing Center (IPCC) project at IT4Innovations and has experience with code parallelization, vectorization and acceleration using the Intel® Xeon Phi™ coprocessors.

Links
Ondřej Jakl
  • Thursday, 1 March
    • 09:30 10:00
      Registration/presentation 207

      207

      VŠB - Technical University Ostrava, IT4Innovations building

      Studentská 6231/1B 708 33 Ostrava – Poruba Czech Republic
    • 10:00 11:15
      Latest Intel Architectures for HPC 207

      207

      VŠB - Technical University Ostrava, IT4Innovations building

      Studentská 6231/1B 708 33 Ostrava – Poruba Czech Republic
    • 11:15 12:00
      Performance: How to achieve it? 207

      207

      VŠB - Technical University Ostrava, IT4Innovations building

      Studentská 6231/1B 708 33 Ostrava – Poruba Czech Republic
    • 12:00 13:00
      Lunch 1h Restaurant Pustkovecka Basta

      Restaurant Pustkovecka Basta

    • 13:00 13:45
      Intel Compilers for C/C++ and Fortran 207

      207

      VŠB - Technical University Ostrava, IT4Innovations building

      Studentská 6231/1B 708 33 Ostrava – Poruba Czech Republic
    • 13:45 14:30
      Profiling: Understand your application 207

      207

      VŠB - Technical University Ostrava, IT4Innovations building

      Studentská 6231/1B 708 33 Ostrava – Poruba Czech Republic
    • 14:30 15:00
      Coffee break 30m 207

      207

      VŠB - Technical University Ostrava, IT4Innovations building

      Studentská 6231/1B 708 33 Ostrava – Poruba Czech Republic
    • 15:00 16:30
      Hands On: Profiling 207

      207

      VŠB - Technical University Ostrava, IT4Innovations building

      Studentská 6231/1B 708 33 Ostrava – Poruba Czech Republic
    • 09:00 10:30
      OpenMP 4.5: Threading, offloading & vectorization 207

      207

      VŠB - Technical University Ostrava, IT4Innovations building

      Studentská 6231/1B 708 33 Ostrava – Poruba Czech Republic
    • 10:30 11:00
      Coffee break 30m 207

      207

      VŠB - Technical University Ostrava, IT4Innovations building

      Studentská 6231/1B 708 33 Ostrava – Poruba Czech Republic
    • 11:00 12:00
      Vectorization quality & metrics 207

      207

      VŠB - Technical University Ostrava, IT4Innovations building

      Studentská 6231/1B 708 33 Ostrava – Poruba Czech Republic
    • 12:00 13:00
      Lunch 1h Restaurant Pustkovecka Basta

      Restaurant Pustkovecka Basta

    • 13:00 14:30
      Hands On: OpenMP 4.5 (threading, offloading & vectorization) 207

      207

      VŠB - Technical University Ostrava, IT4Innovations building

      Studentská 6231/1B 708 33 Ostrava – Poruba Czech Republic
    • 14:30 15:00
      Coffee break 30m 207

      207

      VŠB - Technical University Ostrava, IT4Innovations building

      Studentská 6231/1B 708 33 Ostrava – Poruba Czech Republic
    • 15:00 16:00
      Energy Measurement on Intel Architectures 207

      207

      VŠB - Technical University Ostrava, IT4Innovations building

      Studentská 6231/1B 708 33 Ostrava – Poruba Czech Republic
    • 16:00 16:30
      Q&A 207

      207

      VŠB - Technical University Ostrava, IT4Innovations building

      Studentská 6231/1B 708 33 Ostrava – Poruba Czech Republic