This two-day workshop will provide an introduction to, and hands on experience working with, the Arm HPC architecture and the accompanying ecosystem.
Starting with an introduction to current generation Arm HPC architectures, this workshop will provide an opportunity to build and run your own codes on a 64-node (4,000-core) Arm based super computer.
During the second half of the workshop we will cover more advanced, architecture specific, optimisations including a focus on Arm’s next generation of vectorisation instructions, SVE.
Training will be provided on the use of the system and the software ecosystem which surrounds it, such as compiler and libraries. Additionally for the SVE evaluation we will cover the use of instruction emulators and simulators for code execution on existing hardware.
Note: if you wish to attend only one of the two days, please let us know this when completing the registration form, under "Reason for participation".
For this workshop we will be making use of the Catalyst Fulhame system at EPCC, based on the Marvell ThunderX2 processors.
Although test codes will be provided for the hands-on exercises, all attendees are encouraged to bring their own applications to work on during the practical sessions.
Outline timetable
Day 1
- 09:00 - Registration
- 09:30 - Welcome and Introduction
- Arm architecture
- Software ecosystem
- Porting and optimisation
- Access + logging in
- 12:30 - Lunch
- 13:30 - Hands-on
- Worked examples or own code
- 17-00 Finish
- End of day summary
Day 2
- 9:00 - Start
- Introduction to SVE (Scalable Vector Extensions)
- Using SVE
- Advanced SVE
- 12:30 - Lunch
- 13:30 - Hands-on
- Worked examples or own code
- 17:00 - Finish
- End of event summary
